September 2005
5
M9999-083005
MIC2588/MIC2594
Micrel
AC Electrical Characteristics
(5)
Symbol
Parameter
Condition
Min
Typ
Max Units
t
FLT
Built-in Overcurrent Nuisance Trip
400
祍
Time Delay
(6)
(Figure 1)
t
OCSENSE
Overcurrent Sense to GATE Low
V
SENSE
V
EE
= 100mV
3.5
祍
(Figure 2)
t
OVPHL
OV to GATE Low
(6)
(Figure 3)
1
祍
t
OVPLH
OV to GATE High
(6)
(Figure 3)
1
祍
t
UVPHL
UV to GATE Low
(6)
(Figure 4)
1
祍
t
UVPLH
UV to GATE High
(6)
(Figure 4)
1
祍
t
PGL(1)
DRAIN High to PWRGD Output Low
(6)
R
PULLUP
= 100k? C
LOAD
on PWRGD = 50pF
1
祍
(-1 Version parts only)
t
PGL(2)
DRAIN Low to /PWRGD Output Low
(6)
R
PULLUP
= 100k? C
LOAD
on /PWRGD = 50pF
1
祍
(-2 Version parts only)
t
PGH(1)
DRAIN Low to PWRGD Output High
(6)
R
PULLUP
= 100k? C
LOAD
on PWRGD = 50pF
2
祍
(-1 Version parts only)
t
PGH(2)
DRAIN High to /PWRGD Output High
(6)
R
PULLUP
= 100k? C
LOAD
on /PWRGD = 50pF
2
祍
(-2 Version parts only)
Notes:
5. Specication for packaged product only.
6. Not 100% production tested. Parameters are guaranteed by design.
Timing Diagrams
I
LIMIT
I
LOAD
0A
V
DRAIN
V
GATE
(V
EE
+10V)
t < t
FLT
t ?t
FLT
(at V
EE
)
(at V
EE
)
(at V
EE
)
OVERCURRENT
EVENT
Output OFF
(at V
DD
)
Load current is regulated
at I
LIMIT
= 50mV/R
SENSE
Reduction in V
DRAIN
to support
I
LIMIT
= 50mV/R
SENSE
Figure 1. Overcurrent Response
V
SENSE
- V
EE
100mV
1V
t
OCSENSE
V
GATE
Figure 2. SENSE to GATE LOW Timing Response